`define VERSION 32'h20000024

module debugger_usb3 (
  input           clk,
  input           clk_50M,
  input           reset_n,

  input        USB3_UART_IN,
  output       USB3_RST_OUT,
  output       USB3_PCLK,
  inout [7:0]  USB3_DQ,
  input        USB3_A0,
  output       USB3_A1,
  output       USB3_SLCS_N,
  output       USB3_SLWR_N,
  output       USB3_SLOE_N,
  output       USB3_SLRD_N,
  input        USB3_FLAGA,
  input        USB3_FLAGB,
  input        USB3_CMD_CLK,//GPIO[50]  
  input        USB3_CMD_DAT_U2F,//#GPIO[51]  
  output       USB3_CMD_DAT_F2U,//#GPIO[52]  

  input dummy
);
assign USB3_DQ = 8'bz;
assign USB3_RST_OUT = 1'b1;

altsource_probe  altsource_probe_component1 (
  .probe (USB3_A0),
  .source (prob_out)
);
defparam
  altsource_probe_component1.enable_metastability = "NO",
  altsource_probe_component1.instance_id = "DATA",
  altsource_probe_component1.probe_width = 32,
  altsource_probe_component1.sld_auto_instance_index = "YES",
  altsource_probe_component1.sld_instance_index = 1,
  altsource_probe_component1.source_initial_value = " 0",
  altsource_probe_component1.source_width = 32;

altsource_probe  altsource_probe_component2 (
  .probe (USB3_DQ),
  .source (prob_out)
);
defparam
  altsource_probe_component2.enable_metastability = "NO",
  altsource_probe_component2.instance_id = "CMD ",
  altsource_probe_component2.probe_width = 32,
  altsource_probe_component2.sld_auto_instance_index = "YES",
  altsource_probe_component2.sld_instance_index = 1,
  altsource_probe_component2.source_initial_value = " 0",
  altsource_probe_component2.source_width = 32;


localparam S_IDLE     = 0;
localparam S_CMD_IN   = 1;

  wire cmd = cmd_data[39:32];
  wire data = cmd_data[31:0];
  reg [39:0] cmd_data;
  reg [5:0] cnt_in;
  reg [3:0] status;
  always @(posedge USB3_CMD_CLK or negedge reset_n) begin
    if (!reset_n) begin
		cnt_in <= 0;
		status <= 0;
		cmd_data <= 0;
    end else begin
		case(status)
		S_IDLE:begin
			if(USB3_CMD_DAT_U2F)begin
				cnt_in <= 0;
				status <= S_CMD_IN;
			end
		end
		S_CMD_IN:begin
			cnt_in <= cnt_in + 1;
			cmd_data <= {USB3_CMD_DAT_U2F,cmd_data[39:1]};
			if(cnt_in==40)begin
				status <= S_IDLE;
			end
		end
		
		endcase
  
    end
  end






endmodule
